PARALLEL-SEQUENTIAL ANALOG-DIGITAL CONVERTERS WITH NONLINEARITY ERROR CORRECTION

Abstract

The paper proposes a method for increasing the resolution of parallel-to-sequential analog-to-digital converters (PSADCs) by correcting nonlinearity errors. It is proved that the PSADCs with adjustment functions as a two-stage ADC. The first ADC (ADC1) converts the input signal into a code . Upon the signal of the end of the conversion in ADC1, the second ADC (ADC2) is started, which converts the remaining signal into a code . The total correction value is formed in the adder, which corrects the conversion error in ADC1. At the end of the conversion, the ADC1 code is summed with the correction in the adder. This result is then summed at the end of the conversion in ADC1 with the source code of ADC2. As a result, the adjusted n-bit conversion result is read from the output of the adder.

Structural schemes of PSADCs based on integral and differential correction of ADC nonlinearity errors are given. The considered structures of PSADCs do not require the use of an accurate digital-to-analog converter at the stage of determining bit errors. The proposed correction method makes it possible to remove progressive errors directly from high-speed PSADCs due to the fact that the corrective action in it is carried out in digital form.

The developed PSADCs enable signal conversion in a wide frequency band and are characterized by high resolution and conversion error compliance with the declared resolution of the ADC.

An analysis of the effectiveness of the proposed method of improving the resolution of the PSADCs was performed. NI Multisim 11.0 circuit simulation package was used to quantitatively evaluate the performance of the PSADCs with correction of nonlinearity errors. At the same time, the output signal of the ADC was studied in the frequency domain, that is, the numerical parameters of the spectrum of the analog equivalent of the ADC output signal were analyzed. The simulation results made it possible to state that the method of digital correction of PSADCs nonlinearity errors makes it possible to increase the effective bit rate of the converter by 1.9 bits.