PARALLEL ANALOG-DIGITAL CONVERTER WITH CORRECTION OF THE TIME UNCERTAINTY OF THE OUTPUT SIGNAL

Abstract

The paper proposes a method of expanding the dynamic range of parallel analog-to-digital converters (ADCs) on the basis of adjusting the time uncertainty of the output signal. It was established that the discretization of the input signal in real ADCs of the parallel type is accompanied by a deviation of the actual moments of formation of the signal readings from their nominal position on the time axis. As a result, the phenomenon of temporal uncertainty of the output signal of the parallel ADC occurs. This leads to the appearance of parasitic frequency components in the frequency spectrum of the output signal of the converter, which narrow the dynamic range of the ADC.

The adjustment process consists of two stages: assessment and compensation. At the first stage, the value of time uncertainty is estimated. Finding the error due to time uncertainty is carried out for the input test signal of the ADC with the minimum spectrum width. Time instability error compensation is performed digitally using Taylor series expansion. It was established that with the increase in the number of members of the Taylor series, which take part in the formation of the output signal of the ADC, the accuracy of the adjustment increases, but at the same time, the hardware implementation is complicated and the speed of the ADC adjustment tools deteriorates. To overcome this contradiction, the ADC output signal is formed based on the first three members of the Taylor series.

The structure of a parallel analog-to-digital conversion device with multiphase sampling based on the parallel build-up of several ADC channels is presented. The analog-to-digital conversion device operates in two modes. The calibration stage is performed in a conventionally real time scale. In the operating mode, a real analog signal is applied to the input bus of the ADC. The corrected output signal of the ADC is fed to the output bus of the device.

Analysis of the effectiveness of the proposed method confirmed that thanks to the developed method, it is possible to expand the dynamic range of a 16-bit high-speed ADC by 25 dB in the high frequency band.